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ChargeCache: Reducing DRAM Latency by Exploiting Row Access Locality
DRAM latency continues to be a critical bottleneck for system performance. In this work, we develop a low-cost mechanism, called ChargeCache, that enables faster access to recently-accessed rows in DRAM, with no modifications ...
SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies
DRAM is the primary technology used for main memory in modern systems. Unfortunately, as DRAM scales down to smaller technology nodes, it faces key challenges in both data integrity and latency, which strongly affects ...