Now showing items 1-4 of 4
Exploiting Virtual Addressing for Increasing Reliability
(IEEE Computer Soc., 2014-01)
A novel method to protect a system against errors resulting from soft errors occurring in the virtual address (VA) storing structures such as translation lookaside buffers (TLB), physical register file (PRF) and the program ...
Exploiting processor features to implement error detection in reduced precision matrix multiplications
Modern processors incorporate complex arithmetic units that can work with large word-lengths. Those units are useful for applications that require high precision. There are however, many applications for which the use of ...
Exploiting Existing Comparators for Fine-Grained Low-Cost Error Detection
(ASSOC Computing Machinery, 2014-10)
Fault tolerance has become a fundamental concern in computer design, in addition to performance and power. Although several error detection schemes have been proposed to discover a faulty core in the system, these proposals ...
Bit Impact Factor: Towards making fair vulnerability comparison
Reliability is becoming a major design concern in contemporary microprocessors since soft error rate is increasing due to technology scaling. Therefore, design time system vulnerability estimation is of paramount importance. ...